'Senior role with highly successful R&D group for a talented FPGA engineer. Enjoy full life cycle responsibilities across architecture, synthesis, simulation, verification, optimisation, and support. Build customised IP cores, write VHDL code for high-spec Xilinx FPGAs (Verilog background acceptable), utilise your high speed board-level design skills along with algorithm design, timing closure, and networking experience. A creative person who enjoys working with new technologies and is able to design from a systems perspective would be preferred. Fintech, biomedical, defence, avionics, networking or media experience helpful.

Essential:

• Sound FPGA digital design background (Xilinx preferred)
• Strong VHDL or Verilog skills
• Experience with synthesis and timing closure
• High speed digital design, building customised IP cores
• IP networking and integration experience
• Strong debugging skills
• A track record of successful commercial product design

Optional:

• ISE, Vivado, Virtex family,
• Modelsim
• DSP exposure, embedded C/C++

Please contact Daryl Hubber on 02-9431-6507 for further details. Otherwise, apply in the normal way.


Please Note: Australian permanent residency or a valid working visa is essential.